ODMB7_UCSB_DEV
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Design Unit List
Here is a list of all design unit members with links to the Entities they belong to:
[detail level 12]
oCCALIBTRG
|\CCALIBTRG.CALIBTRG_arch
oCCB8CE
|\CCB8CE.Behavioral
oCCFEBJTAGModule handling JTAG (slow control) communication to (x)DCFEBs within ODMB VME
|\CCFEBJTAG.CFEBJTAG_Arch
oCCOMMAND_MODULEModule that interprets VME commands for modules in ODMB VME
|\CCOMMAND_MODULE.COMMAND_MODULE_Arch
oCCONFREGS_DUMMY
|\CCONFREGS_DUMMY.CONFREGS_DUMMY_Arch
oCCOUNT_EDGES
|\CCOUNT_EDGES.COUNT_EDGES_ARCH
oCDELAY_SIGNAL
|\CDELAY_SIGNAL.DELAY_SIGNAL_Arch
oCDUMMY_TRIGCTRL
|\CDUMMY_TRIGCTRL.DUMMY_TRIGCTRL_arch
oCILD
oCLCTDLY
|\CLCTDLY.LCTDLY_Arch
oCLVDBMONVME device that monitors voltages on LVMB and powers on/off DCFEBs+ALCT
|\CLVDBMON.LVDBMON_Arch
oCNPULSE2FAST
|\CNPULSE2FAST.NPULSE2FAST_Arch
oCNPULSE2SAME
|\CNPULSE2SAME.NPULSE2SAME_Arch
oCodmb7_ucsb_devODMB7 prototype firmware
|\Codmb7_ucsb_dev.Behavioral
oCodmb_clockingODMB7 clock management module
|\Codmb_clocking.Clocking_Arch
oCODMB_CTRL
|\CODMB_CTRL.Behavioral
oCODMB_VMEODMB7 VME (slow control) module
|\CODMB_VME.Behavioral
oConeshot
|\Coneshot.behavioral
oCPRBS_GEN
|\CPRBS_GEN.PRBS_GEN_Arch
oCPULSE2FAST
|\CPULSE2FAST.PULSE2FAST_Arch
oCPULSE2SAME
|\CPULSE2SAME.PULSE2SAME_Arch
oCPULSE2SLOW
|\CPULSE2SLOW.PULSE2SLOW_Arch
oCPULSE_EDGE
|\CPULSE_EDGE.PULSE_EDGE_Arch
oCSPI_CTRLModule that interprets PROM commands and controls post-startup communication with EPROMs
|\CSPI_CTRL.SPI_CTRL_Arch
oCspi_interfaceModule that directly generates SPI signals for post-startup communication with EPROMS
|\Cspi_interface.behavioral
oCSPI_PORTVME device that acts as user interface to EPROM
|\CSPI_PORT.SPI_PORT_Arch
oCSpiCsBflop
|\CSpiCsBflop.flop
oCspiflashprogrammer_test
|\Cspiflashprogrammer_test.behavioral
oCSYSTEM_MONVME device controlling access to ODMB board monitoring (currents, voltages, temperature)
|\CSYSTEM_MON.SYSTEM_MON_ARCH
oCSYSTEM_TESTSYSTEM_TEST: VME module that provides utilities for testing components of ODMB
|\CSYSTEM_TEST.SYSTEM_TEST_Arch
oCVMECONFREGSModule for interacting with configuration and constant registers loaded from nonvolatile memory
|\CVMECONFREGS.VMECONFREGS_Arch
oCVMEMONModule that monitors various registers, sets certain voltaile settings, and sends reset signals
|\CVMEMON.VMEMON_Arch
\Cvoltage_monModule implementing SPI interface to MAX1271B chips
 \Cvoltage_mon.voltage_mon_arch
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