PULSE2FAST Entity Reference

Inheritance diagram for PULSE2FAST:

Entities
PULSE2FAST_Arch	architecture

Libraries
ieee
unisim

Use Clauses
ieee.std_logic_1164.all
unisim.vcomponents.all

Ports
DOUT	out std_logic := ' 0 '
CLK_DOUT	in std_logic
RST	in std_logic
DIN	in std_logic

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The documentation for this class was generated from the following file:

• /homes/oshiro/odmb/firmware/odmb7_ucsb_dev/source/utils/pulse2fast.vhd