COMMAND_MODULE_Arch Architecture Reference

Processes
PROCESS_1	( FASTCLK , AS )

Components
CB8CE	<Entity CB8CE>
ILD	<Entity ILD>

Signals
CGA	std_logic_vector ( 5 downto 0 )
AMS	std_logic_vector ( 5 downto 0 )
ADRS_INNER	std_logic_vector ( 23 downto 1 )
GOODAM	std_logic
VALIDAM	std_logic
VALIDGA	std_logic
SYSOK	std_logic
OLDCRATE	std_logic
PRE_BOARDENB	std_logic
BROADCAST	std_logic
BOARDENB	std_logic
BOARD_SEL_NEW	std_logic
ASYNSTRB	std_logic
ASYNSTRB_NOT	std_logic
FASTCLK_NOT	std_logic
STROBE_TEMP1	std_logic
STROBE_TEMP2	std_logic
ADRSHIGH	std_logic
D1	std_logic
C1	std_logic
Q1	std_logic
D2	std_logic
C2	std_logic
Q2	std_logic
D3	std_logic
C3	std_logic
Q3	std_logic
D4	std_logic
C4	std_logic
D1_second	std_logic
C1_second	std_logic
Q1_second	std_logic
D2_second	std_logic
C2_second	std_logic
Q2_seconD	std_logic
D3_second	std_logic
C3_second	std_logic
Q3_second	std_logic
D4_second	std_logic
C4_second	std_logic
Q4_second	std_logic
D5_second	std_logic
C5_second	std_logic
TOVME_INNER	std_logic
CE_DOE_B	std_logic
CLR_DOE_B	std_logic
TIMER	std_logic_vector ( 7 downto 0 )
TOVME_INNER_B	std_logic
ADRSDEV	std_logic_vector ( 4 downto 0 )

Instantiations
cb8ce_doe	CB8CE <Entity CB8CE>
fdc_strobe	fdc
fdc_1_strobe	fdc_1

---

The documentation for this class was generated from the following files:

• /homes/oshiro/odmb/firmware/odmb7_ucsb_dev/source/odmb_vme/command_module.vhd