Clocking_Arch Architecture Reference

Components
clockManager

Signals
mgtrefclk0_224_odiv2	std_logic
mgtrefclk0_225_odiv2	std_logic
mgtrefclk0_226_odiv2	std_logic
mgtrefclk1_226_odiv2	std_logic
mgtrefclk0_227_odiv2	std_logic
mgtrefclk1_227_odiv2	std_logic
clk_sysclk5	std_logic
clk2p5_unbuf	std_logic := ' 0 '
clk1p25_unbuf	std_logic := ' 0 '
clk625k_unbuf	std_logic := ' 0 '
clk2p5_inv	std_logic := ' 1 '
clk1p25_inv	std_logic := ' 1 '
clk625k_inv	std_logic := ' 1 '
clk_cmsclk_unbuf	std_logic
clk_gp6_unbuf	std_logic
clk_gp7_unbuf	std_logic

Instantiations
u_buf_gth_q0_clk0	ibufds_gte3
u_buf_gth_q1_clk0	ibufds_gte3
u_buf_gth_q2_clk0	ibufds_gte3
u_buf_gth_q2_clk1	ibufds_gte3
u_buf_gth_q3_clk0	ibufds_gte3
u_buf_gth_q3_clk1	ibufds_gte3
u_ibufgds_gp7	ibufgds
u_ibufgds_gp6	ibufgds
u_ibufgds_cms	ibufgds
u_bufg_gp7	bufg
u_bufg_gp6	bufg
u_bufg_cms	bufg
u_bufg_emc	bufg
u_bufg_lfc	bufg
u_mgtclk0_q224	bufg_gt
u_mgtclk0_q225	bufg_gt
u_mgtclk0_q226	bufg_gt
u_mgtclk1_q226	bufg_gt
u_mgtclk0_q227	bufg_gt
u_mgtclk1_q227	bufg_gt
clockmanager_i	clockmanager
fd_clk2p5	fd
fd_clk1p25	fd
fd_clk625k	fd
bufg_clk2p5	bufg
bufg_clk1p25	bufg
bufg_clk625k	bufg

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The documentation for this class was generated from the following file:

• /homes/oshiro/odmb/firmware/odmb7_ucsb_dev/source/odmb_clocking.vhd