ODMB7_UCSB_DEV
 All Classes Files Variables
Signals | Processes | Instantiations
COUNT_EDGES_ARCH Architecture Reference

Processes

edge_cnt_proc  ( CLK , RST )

Signals

din_q  std_logic := ' 0 '
din_qq  std_logic := ' 0 '
count_inner  std_logic_vector ( WIDTH - 1 downto 0 )

Instantiations

fddin  fdc
fddin2  fdc

The documentation for this class was generated from the following files: