ODMB7_UCSB_DEV
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spiflashprogrammer_test Entity Reference
Inheritance diagram for spiflashprogrammer_test:
SpiCsBflop oneshot

Entities

behavioral  architecture
 

Libraries

ieee 
UNISIM 

Use Clauses

ieee.std_logic_1164.all 
ieee.std_logic_unsigned.all 
ieee.numeric_std.all 
UNISIM.vcomponents.all 
work.Firmware_pkg.all 

Ports

Clk   in std_logic
fifoclk   in std_logic
data_to_fifo   in std_logic_vector ( 15 downto 0 )
startaddr   in std_logic_vector ( 31 downto 0 )
startaddrvalid   in std_logic
pagecount   in std_logic_vector ( 17 downto 0 )
pagecountvalid   in std_logic
sectorcount   in std_logic_vector ( 13 downto 0 )
sectorcountvalid   in std_logic
fifowren   in std_logic
fifofull   out std_logic
fifoempty   out std_logic
fifoafull   out std_logic
fifowrerr   out std_logic
fiforderr   out std_logic
writedone   out std_logic
reset   in std_logic
read   in std_logic
readdone   out std_logic
write   in std_logic
erase   in std_logic
eraseing   out std_logic
erasedone   out std_logic
write_nwords   in unsigned ( 11 downto 0 )
startwrite   out std_logic
out_read_inprogress   out std_logic
out_rd_SpiCsB   out std_logic
out_SpiCsB_N   out std_logic
out_read_start   out std_logic
out_SpiMosi   out std_logic
out_SpiMiso   out std_logic
out_CmdSelect   out std_logic_vector ( 7 downto 0 )
in_CmdIndex   in std_logic_vector ( 3 downto 0 )
in_rdAddr   in std_logic_vector ( 31 downto 0 )
in_wdlimit   in std_logic_vector ( 31 downto 0 )
out_SpiCsB_FFDin   out std_logic
out_rd_data_valid_cntr   out std_logic_vector ( 3 downto 0 )
out_rd_data_valid   out std_logic
out_nword_cntr   out std_logic_vector ( 31 downto 0 )
out_cmdreg32   out std_logic_vector ( 39 downto 0 )
out_cmdcntr32   out std_logic_vector ( 5 downto 0 )
out_rd_rddata   out std_logic_vector ( 15 downto 0 )
out_rd_rddata_all   out std_logic_vector ( 15 downto 0 )
out_er_status   out std_logic_vector ( 1 downto 0 )
out_wr_rddata   out std_logic_vector ( 1 downto 0 )
out_wr_statusdatavalid   out std_logic
out_wr_spistatus   out std_logic_vector ( 1 downto 0 )
out_wrfifo_dout   out std_logic_vector ( 3 downto 0 )
out_wrfifo_rden   out std_logic

The documentation for this class was generated from the following file: