ODMB7_UCSB_DEV
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![]() ![]() | ODMB7 prototype firmware |
![]() ![]() ![]() | ODMB7 clock management module |
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![]() ![]() ![]() | ODMB7 VME (slow control) module |
![]() ![]() ![]() ![]() | Module handling JTAG (slow control) communication to (x)DCFEBs within ODMB VME |
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![]() ![]() ![]() ![]() | Module that monitors various registers, sets certain voltaile settings, and sends reset signals |
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![]() ![]() ![]() ![]() | Module for interacting with configuration and constant registers loaded from nonvolatile memory |
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![]() ![]() ![]() ![]() | VME device that acts as user interface to EPROM |
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![]() ![]() ![]() ![]() | VME device controlling access to ODMB board monitoring (currents, voltages, temperature) |
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![]() ![]() ![]() ![]() ![]() | Module implementing SPI interface to MAX1271B chips |
![]() ![]() ![]() ![]() | VME device that monitors voltages on LVMB and powers on/off DCFEBs+ALCT |
![]() ![]() ![]() ![]() | SYSTEM_TEST: VME module that provides utilities for testing components of ODMB |
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![]() ![]() ![]() ![]() | Module that interprets VME commands for modules in ODMB VME |
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![]() ![]() ![]() ![]() | Module that interprets PROM commands and controls post-startup communication with EPROMs |
![]() ![]() ![]() ![]() ![]() | Module that directly generates SPI signals for post-startup communication with EPROMS |
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