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ODMB7_UCSB_DEV
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Entities | |
| Behavioral | architecture |
Libraries | |
| IEEE | |
| unisim | |
Use Clauses | |
| ieee.std_logic_1164.all | |
| ieee.numeric_std.all | |
| ieee.std_logic_misc.all | |
| unisim.vcomponents.all | |
| work.ucsb_types.all | |
Generics | |
| NCFEB | integer range 1 to 7 := 7 |
Ports | |
| CLK80 | in std_logic |
| CLK40 | in std_logic |
| TEST_CCBINJ | in std_logic |
| TEST_CCBPLS | in std_logic |
| TEST_CCBPED | in std_logic |
| LCT_L1A_DLY | in std_logic_vector ( 5 downto 0 ) |
| INJ_DLY | in std_logic_vector ( 4 downto 0 ) |
| EXT_DLY | in std_logic_vector ( 4 downto 0 ) |
| CALLCT_DLY | in std_logic_vector ( 3 downto 0 ) |
| CAL_MODE | in std_logic |
| PEDESTAL | in std_logic |
| RAW_L1A | in std_logic |
| DCFEB_INJPULSE | out std_logic |
| DCFEB_EXTPULSE | out std_logic |
| DCFEB_L1A | out std_logic |
| DCFEB_L1A_MATCH | out std_logic_vector ( NCFEB downto 1 ) |
| DIAGOUT | out std_logic_vector ( 17 downto 0 ) |
| RST | in std_logic |
1.8.5
